1. Field of the Invention
The present invention relates to system architectures for data processing, and more particularly to an architecture based upon a hardware engine which performs operations and computations on data as the data traverses paths controlled by software.
2. Description of Related Art
Traditional data processing systems are based on architectures having a pipeline based execution unit, and instruction fetch unit, and a storage unit which are operated in response to decoded instructions. The instructions are decoded to produce microcode that controls the operation of the data processing pipeline. The execution unit is a very complicated general-purpose logic system designed to execute a fixed number of operations under microcode control, and which becomes inflexible and difficult to change as its complexity grows.
This traditional architecture arose because the cost of the manufacture and design of logic has been historically higher than the cost of moving data into the logic system. However, recent advances in manufacturing and design are bringing down the cost of the design and implementation of logic, as compared to the cost of routing signals.
It is an object of the present invention to take advantage of this trend in integrated circuit and data processing system manufacturing and design to provide a data processing architecture that reduces the complexity and inflexibility of data processing systems.